存储等级（Memory Hierarchy）

Register

Cache

RAM(Main memory)

SSD(Solid-state disk)

Disk (magnetic)

CPU architecture basics

ALU (Arithmetic Logic Unit )

Bitwise logical operations

Bitwise shift operations

SIMD (Single instruction multiple data )

Each core has a SIMD unit in a CPU

SIMD execution model

(a) Scalar mode: one operation produces one result.

(b) SIMD mode: one operation produces multiple results.

Intel intrinsic instructions

1. _mm_cmpgt_epi8

2. _mm_cmplt_epi8

3. _mm_cmpeq_epi8

4. _mm_movemask_epi8

5. _mm_and_si128

6. _mm_sad_epu8

7. _mm_cvtsi128_si32

8. _popcnt32

9. _mm_srli_si128

Superscalar CPU (MIMD, Multiple instruction multiple data )

Super-scalar CPUs add the possibility to issue more then one instruction per cycle. As long as these instructions are independent, each of them is dispatched into one of several parallel pipelines. Therefore, a super-scalar CPU can achieve an IPC (Instructions Per Cycle) higher than 1.

MM (Memory Model )

The resolution of a memory address

编程语言（Programming language）

High level language (C++, Java, Python etc.)

源代码（source code）→ 预处理器（preprocessor）→ 编译器（compiler）→ 汇编程序（assembler）→ 目标代码（object code）

目标代码（object code） → 链接器（Linker）→ 可执行文件（executables）

Machine code (instructions )