“计算机系统”版本间的差异
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=计算机硬件体系结构= | =计算机硬件体系结构= | ||
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| + | 计算机硬件是信息的存储，传输与处理的基本设备。 | ||
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| + | ==基本设计原则== | ||
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| + | 设计原则：计算机硬件的组织方式，如计算、存储、通信之间的模式，应该和功用相适应。 | ||
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| + | ==计算机硬件的主要组件（components）== | ||
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| + | 计算机硬件的主要组件（components）有处理器CPU、主存储器（Main Memory）、磁盘（Disk）、传输总线设备（Bus）、外设辅助设备（IO）等等。 | ||
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==存储等级（Memory Hierarchy） == | ==存储等级（Memory Hierarchy） == | ||
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Bitwise shift operations | Bitwise shift operations | ||
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===SIMD (Single instruction multiple data )=== | ===SIMD (Single instruction multiple data )=== | ||
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(b) SIMD mode: one operation produces multiple results. | (b) SIMD mode: one operation produces multiple results. | ||
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===Intel intrinsic instructions=== | ===Intel intrinsic instructions=== | ||
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| − | === | + | ===Super-scalar CPU (MIMD, Multiple instruction multiple data )=== |
Super-scalar CPUs add the possibility to issue more then one instruction per cycle. As long as these instructions are independent, each of them is dispatched into one of several parallel pipelines. Therefore, a super-scalar CPU can achieve an IPC (Instructions Per Cycle) higher than 1. | Super-scalar CPUs add the possibility to issue more then one instruction per cycle. As long as these instructions are independent, each of them is dispatched into one of several parallel pipelines. Therefore, a super-scalar CPU can achieve an IPC (Instructions Per Cycle) higher than 1. | ||
2017年5月9日 (二) 06:13的版本
目录
计算机硬件体系结构
计算机硬件是信息的存储，传输与处理的基本设备。
基本设计原则
设计原则：计算机硬件的组织方式，如计算、存储、通信之间的模式，应该和功用相适应。
计算机硬件的主要组件（components）
计算机硬件的主要组件（components）有处理器CPU、主存储器（Main Memory）、磁盘（Disk）、传输总线设备（Bus）、外设辅助设备（IO）等等。
存储等级（Memory Hierarchy）
Register
Cache
RAM(Main memory)
SSD(Solid-state disk)
Disk (magnetic)
处理器架构（CPU architecture）
ALU (Arithmetic Logic Unit )
Bitwise logical operations
Bitwise shift operations
SIMD (Single instruction multiple data )
Each core has a SIMD unit in a CPU
SIMD execution model
(a) Scalar mode: one operation produces one result.
(b) SIMD mode: one operation produces multiple results.
Intel intrinsic instructions
1. _mm_cmpgt_epi8
2. _mm_cmplt_epi8
3. _mm_cmpeq_epi8
4. _mm_movemask_epi8
5. _mm_and_si128
6. _mm_sad_epu8
7. _mm_cvtsi128_si32
8. _popcnt32
9. _mm_srli_si128
Super-scalar CPU (MIMD, Multiple instruction multiple data )
Super-scalar CPUs add the possibility to issue more then one instruction per cycle. As long as these instructions are independent, each of them is dispatched into one of several parallel pipelines. Therefore, a super-scalar CPU can achieve an IPC (Instructions Per Cycle) higher than 1.
MM (Memory Model )
The resolution of a memory address
计算机软件
编程语言（Programming language）
High level language (C++, Java, Python etc.)
源代码（source code）→ 预处理器（preprocessor）→ 编译器（compiler）→ 汇编程序（assembler）→ 目标代码（object code）
目标代码（object code） → 链接器（Linker）→ 可执行文件（executables）
Machine code (instructions )
常用软件
操作系统（OS）
数据库（database）
其他工具软件
